<pre id="5ll7j"><ruby id="5ll7j"><b id="5ll7j"></b></ruby></pre><del id="5ll7j"></del>

      <track id="5ll7j"></track>

      <track id="5ll7j"></track>

        <big id="5ll7j"></big>

        <track id="5ll7j"></track>
          <pre id="5ll7j"><pre id="5ll7j"></pre></pre>
          關注微信 意見反饋

          掃描關注摩爾人半導體招聘

          摩爾人招聘
          確定

          您已提交成功

          查看幫助中心
          對職位有興趣?上傳您的簡歷無需注冊,即可直接投遞您心儀的職位
          Synopsys

          Digital Application Engineer (Frontend)

          收藏職位
          • 我要分享
          • 40萬-80萬/年
          • 深圳
          • |
          • 3年以上
          • |
          • 碩士
          • |
          • 全職

          職位誘惑: 年終獎金,五險一金,技術領先,成長空間大,技能培訓

          發布時間: 2022-07-21發布

          職位描述

          Job Responsibilities:
          Front-end application engineer support Synopsys products including synthesis, STA, DFT, formal verification and low power solutions. In addition, they are expected to articulate design methodologies involving Synopsys tools and be elevator-talk proficient in the full Synopsys tool portfolio.

          Requirements: MSEE, or equivalent required with 3+ years of experience, or BSEE or equivalent with 5+ years of experience. Design experiences should include SoC design using Verilog/VHDL, physical aware synthesis, DFT, STA and timing ECO. Experiences in other SoC design activities such as low power design, formal verification and physical design are strongly desired. Excellent verbal and written presentation/communication skills are mandatory. Customer sensitivity, the ability to multiplex many issues & set priorities and have a helpful/caring attitude towards customers, and the desire to help customers exploit new technologies are essential for success in the position.

          職位發布者

          HR

          HR

          7天

          簡歷處理用時

          100%

          簡歷及時處理率

          您還未登錄。已有賬號, 點此登錄,直接投遞

          推薦朋友

          一鍵投遞
          男男紧致娇嫩含不住h

            <pre id="5ll7j"><ruby id="5ll7j"><b id="5ll7j"></b></ruby></pre><del id="5ll7j"></del>

              <track id="5ll7j"></track>

              <track id="5ll7j"></track>

                <big id="5ll7j"></big>

                <track id="5ll7j"></track>
                  <pre id="5ll7j"><pre id="5ll7j"></pre></pre>